Applications, 1 ground-centered line outputs, 2 sample rate range/operational mode detect – Cirrus Logic CS4354 User Manual

Page 13: 3 system clocking, Section 4.2 “sample rate range/operational

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DS895F2

13

CS4354

4. APPLICATIONS

4.1

Ground-Centered Line Outputs

An on-chip charge pump creates a negative supply which allows the full-scale output swing to be centered
around ground. This eliminates the need for large DC-blocking capacitors which create audible pops at pow-
er-on and provides improved low frequency response. See the

DAC Analog Characteristics

table for the

complete specifications of the full-scale output voltage. It should be noted that external output impedance
between the AOUTx pin and the load will lower the voltage delivered to the load.

4.2

Sample Rate Range/Operational Mode Detect

The CS4354 operates in one of three operational modes. The device will auto-detect the correct mode when
the input sample rate (Fs), defined by the LRCK frequency, falls within one of the ranges illustrated in

Table 3

. Sample rates outside the specified range for each mode are not supported. In addition to a valid

LRCK frequency, a valid serial clock (SCLK) and master clock (MCLK) must also be applied to the device
for speed mode auto-detection; see

Figure 9

.

Table 3. CS4354 Operational Mode Auto-Detect

4.3

System Clocking

The device requires external generation of the master (MCLK), left/right (LRCK) and serial (SCLK) clocks.
The left/right clock, defined also as the input sample rate (Fs), must be synchronously derived from the
MCLK signal according to specified ratios. The specified ratios of MCLK to LRCK, along with several stan-
dard audio sample rates and the required MCLK frequency, are illustrated in

Table 4 on page 13

.

Refer to

Section 4.6

for the required SCLK timing associated with the selected Digital Interface Format and

to

“Switching Specifications - Serial Audio Interface” on page 8

for the maximum allowed clock frequencies.

Table 4. Common MCLK and LRCK Frequencies

Input Sample Rate (Fs)

Mode

30 kHz - 54 kHz

Single-Speed Mode

84 kHz - 108 kHz

Double-Speed Mode

170 kHz - 216 kHz

Quad-Speed Mode

LRCK

(kHz)

MCLK (MHz)

128x

192x

256x

384x

512x

768x

1024x

32

-

-

8.1920

12.2880

16.3840

24.5760

32.7680

44.1

-

-

11.2896

16.9344

22.5792

33.8688

45.1580

48

-

-

12.2880

18.4320

24.5760

36.8640

49.1520

88.2

11.2896

16.9344

22.5792

33.8688

45.1584

-

-

96

12.2880

18.4320

24.5760

36.8640

49.1520

-

-

176.4

22.5792

33.8688

45.1584

-

-

-

-

192

24.5760

36.8640

49.1520

-

-

-

-

Mode

QSM

DSM

SSM

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