Cirrus Logic CS4385A - Manual (Page 2)

2 DS837F2
CS4385A
TABLE OF CONTENTS
1. PIN DESCRIPTION .............................................................................................................................. 6
2. CHARACTERISTICS AND SPECIFICATIONS ...................................................................................... 8
RECOMMENDED OPERATING CONDITIONS ..................................................................................... 8
ABSOLUTE MAXIMUM RATINGS ......................................................................................................... 8
DAC ANALOG CHARACTERISTICS - COMMERCIAL (-CQZ) ............................................................. 9
DAC ANALOG CHARACTERISTICS - AUTOMOTIVE (-DQZ) ............................................................ 10
POWER AND THERMAL CHARACTERISTICS .................................................................................. 11
COMBINED INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSE ...................................... 12
COMBINED INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSE (CONTINUED) .............. 13
DSD COMBINED DIGITAL & ON-CHIP ANALOG FILTER RESPONSE ............................................. 13
DIGITAL CHARACTERISTICS ............................................................................................................. 14
SWITCHING CHARACTERISTICS - PCM ........................................................................................... 15
SWITCHING CHARACTERISTICS - DSD ........................................................................................... 16
SWITCHING CHARACTERISTICS - CONTROL PORT - I²C FORMAT .............................................. 17
SWITCHING CHARACTERISTICS - CONTROL PORT - SPI FORMAT ............................................. 18
3. TYPICAL CONNECTION DIAGRAM .................................................................................................. 19
4. APPLICATIONS ................................................................................................................................... 21
4.1 Master Clock ................................................................................................................................... 21
4.2 Mode Select .................................................................................................................................... 22
4.3 Digital Interface Formats ................................................................................................................ 23
4.3.1 OLM #1 .................................................................................................................................. 24
4.3.2 OLM #2 .................................................................................................................................. 24
4.3.3 OLM #3 .................................................................................................................................. 24
4.3.4 OLM #4 .................................................................................................................................. 25
4.3.5 TDM ....................................................................................................................................... 25
4.4 Oversampling Modes ...................................................................................................................... 25
4.5 Interpolation Filter ........................................................................................................................... 26
4.6 De-Emphasis .................................................................................................................................. 26
4.7 ATAPI Specification ........................................................................................................................ 27
4.8 Direct Stream Digital (DSD) Mode .................................................................................................. 27
4.9 Grounding and Power Supply Arrangements ................................................................................. 28
4.9.1 Capacitor Placement ............................................................................................................. 28
4.10 Analog Output and Filtering .......................................................................................................... 29
4.11 The MUTEC Outputs .................................................................................................................... 30
4.12 Recommended Power-Up Sequence ........................................................................................... 30
4.12.1 Hardware Mode ................................................................................................................... 30
4.12.2 Software Mode .................................................................................................................... 31
4.13 Recommended Procedure for Switching Operational Modes ....................................................... 31
5. CONTROL PORT INTERFACE ............................................................................................................ 32
5.1 MAP Auto Increment ...................................................................................................................... 32
5.2 I²C Mode ......................................................................................................................................... 32
5.2.1 I²C Write ................................................................................................................................ 32
5.2.2 I²C Read ................................................................................................................................ 32
5.3 SPI Mode ........................................................................................................................................ 33
5.3.1 SPI Write ............................................................................................................................... 33
5.4 Memory Address Pointer (MAP) .................................................................................................... 34
5.4.1 INCR (Auto Map Increment Enable) ...................................................................................... 34
5.4.2 MAP4-0 (Memory Address Pointer) ...................................................................................... 34
6. REGISTER QUICK REFERENCE ....................................................................................................... 35
7. REGISTER DESCRIPTION .................................................................................................................. 37
7.1 Chip I.D. and Revision (Address 01h) ............................................................................................ 37
7.1.1 Chip I.D. [Read Only] ............................................................................................................ 37