Cirrus Logic CS4385A - Manual (Page 21)

DS837F2 21
CS4385A
4. APPLICATIONS
The CS4385A serially accepts two’s complement formatted PCM data. Audio data is input via the serial data input
pins (SDINx). The Left/Right Clock (LRCK) determines which channel is currently being input on SDINx, and the
Serial Clock (SCLK) clocks audio data into the input data buffer. For more information on serial audio interfaces, see
Cirrus Application Note AN282, “The 2-Channel Serial Audio Interface: A Tutorial,” available at
www.cirrus.com .
The CS4385A can be configured in Hardware Mode by the M0, M1, M2, M3 and M4 pins and in Software Mode
through I²C or SPI.
4.1 Master Clock
MCLK/LRCK must be an integer ratio as shown in Tables 1 - 3 . The LRCK frequency is equal to Fs, the
frequency at which words for each channel are input to the device. The MCLK-to-LRCK frequency ratio and
speed mode are detected automatically during the initialization sequence by counting the number of MCLK
transitions during a single LRCK period and by detecting the absolute speed of MCLK. Internal dividers are
then set to generate the proper internal clocks.
Tables 1 - 3 illustrate several standard audio sample rates
and the required MCLK and LRCK frequencies. Please note there is no required phase relationship, but MC-
LK, LRCK and SCLK must be synchronous.
Sample Rate
(kHz)
MCLK (MHz)
256x 384x 512x 768x 1024x 1152x
32 8.1920 12.2880 16.3840 24.5760 32.7680 36.8640
44.1 11.2896 16.9344 22.5792 33.8688 45.1584
48 12.2880 18.4320 24.5760 36.8640 49.1520
Table 1. Single-Speed Mode (SSM) Standard Frequencies
Sample Rate
(kHz)
MCLK (MHz)
128x 192x 256x 384x 512x
64 8.1920 12.2880 16.3840 24.5760 32.7680
88.2 11.2896 16.9344 22.5792 33.8688 45.1584
96 12.2880 18.4320 24.5760 36.8640 49.1520
Table 2. Double-Speed Mode (DSM) Standard Frequencies
Sample Rate
(kHz)
MCLK (MHz)
64x 96x 128x 192x 256x
176.4 11.2896 16.9344 22.5792 33.8688 45.1584
192 12.2880 18.4320 24.5760 36.8640 49.1520
Table 3. Quad-Speed Mode (QSM) Standard Frequencies
= Denotes clock ratio and sample rate combinations which are NOT supported under auto speed-
mode detection. Please see “Switching Characteristics - PCM” on page 15 .