General purpose i/o, 1 pin descriptions, 2 gpio architecture – Cirrus Logic CS5378 User Manual

Page 64: 3 gpio registers, 4 gpio input mode, 5 gpio output mode, Pin descriptions, Gpio architecture, Gpio registers, Gpio input mode

Advertising
background image

CS5378

DS639F3

64

19. GENERAL PURPOSE I/O

The General Purpose I/O (GPIO) block provides 8
general purpose pins to interface with external
hardware.

19.1 Pin Descriptions

GPIO[3:0] - Pins 4 - 1

Standard GPIO pins.

GPIO[6:4]:PLL[2:0] - Pins 7 - 5

Standard GPIO pins also used to select the PLL
mode after reset. Internal pull-ups default high,
10 k

Ω external pull-downs required to set low.

GPIO7:BOOT - Pin 28

Standard GPIO pin also used to select boot mode
after reset. Internal pull-up defaults high, 10 k

Ω ex-

ternal pull-down required to set low.

19.2 GPIO Architecture

Each GPIO pin can be configured as input or out-
put, high or low, with a weak (~100 k

Ω) internal

pull-up resistor enabled or disabled. Figure 38
shows the structure of a bi-directional GPIO pin.

19.3 GPIO Registers

GPIO pin settings are programmed in the GPCFG
register. GP_DIR bits set the input/output mode,

GP_PULL bits enable/disable the internal pull-up
resistor, and GP_DATA bits set the output data val-
ue. After reset, GPIO pins default as inputs with
pull-up resistors enabled.

19.4 GPIO Input Mode

When reading a value from the GP_DATA bits, the
returned data reports the current state of the pins. If
a pin is externally driven high it reads a logical 1, if
externally driven low it reads a logical 0. When a
GPIO pin is used as an input, the pull-up resistor
should be disabled to save power if it isn’t required.

19.5 GPIO Output Mode

When a GPIO pin is programmed as an output with
a data value of 0, the pin is driven low and the in-
ternal pull-up resistor is automatically disabled.
When programmed as an output with a data value
of 1, the pin is driven high and the pull-up resistor
is inconsequential.

Any GPIO pin can be used as an open-drain output
by setting the data value to 0, enabling the pull-up,
and using the GP_DIR direction bits to control the
pin value. This open-drain output configuration
uses the internal pull-up resistor to hold the pin
high when GP_DIR is set as an input, and drives the
pin low when GP_DIR is set as an output.

Figure 38. GPIO Block Diagram

GPIO

GP_DIR

GP_DATA

GP_PULL

Pull Up

Logic

R

Advertising