Cirrus Logic CS5480 - Manual (Page 7)

CS5480
DS980F3 7
2.1 Analog Pins
The CS5480 has a differential input (VIN ) for voltage
input and two differential inputs  IIN1 IIN2) for
current1 and current2 inputs. The CS5480 also has two
voltage reference pins (VREF
) between which a
bypass capacitor should be placed.
2.1.1 Voltage Input
The output of the line voltage resistive divider or
transformer is connected to the (VIN
) input of the
CS5480. The voltage channel is equipped with a 10x,
fixed-gain amplifier. The full-scale signal level that can
be applied to the voltage channel is ±250mV. If the input
signal is a sine wave, the maximum RMS voltage is
250mVp/
 2

176.78 mV
RMS
, which is approximately
70.7% of maximum peak voltage.
2.1.2 Current1 and Current2 Inputs
The output of the current-sensing shunt resistor,
transformer, or Rogowski coil is connected to the IIN1

or IIN2  input pins of the CS5480. To accommodate
different current-sensing elements, the current channel
incorporates a programmable gain amplifier (PGA) with
two selectable input gains, as described in Config0
register description section
6.6.1 Configuration 0
(Config0) – Page 0, Address 0 on page 37. There is a
10x gain setting and a 50x gain setting. The full-scale
signal level for current channels is ±50mV and ±250mV
for 50x and 10x gain settings, respectively. If the input
signal is a sine wave, the maximum RMS voltage is
35.35mV
RMS
or 176.78mV
RMS
, which is approximately
70.7% of maximum peak voltage.
2.1.3 Voltage Reference
The CS5480 generates a stable voltage reference of
2.4V between the VREF
 pins. The reference system
also requires a filter capacitor of at least 0.1µF between
the VREF
 pins.
The reference system is capable of providing a
reference for the CS5480 but has limited ability to drive
external circuitry. It is strongly recommended that
nothing other than the required filter capacitor be
connected to the VREF
 pins.
2.1.4 Crystal Oscillator
An external, 4.096MHz quartz crystal can be connected
to the XIN and XOUT pins, as shown in Figure 1. To re-
duce system cost, each pin is supplied with an on-chip
load capacitor.
Alternatively, an external clock source can be
connected to the XIN pin.
2.2 Digital Pins
2.2.1 Reset Input
The active-low RESET pin, when asserted for longer
than 120µs, will halt all CS5480 operations and reset
internal hardware registers and states. When
de-asserted, an initialization sequence begins, setting
default register values. To prevent erroneous
noise-induced resets to the CS5480, an external pull-up
resistor and a decoupling capacitor are necessary on
the RESET pin.
2.2.2 Digital Outputs
The CS5480 provides three configurable digital outputs
(DO1-DO3). They can be configured to output energy
pulses, interrupt, zero-crossings, or energy directions.
Refer to the description of the Config1 register in section
6.6.2 Configuration 1 (Config1) – Page 0, Address 1 on
page 38 for more details.
2.2.3 UART/SPI™ Serial Interface
The CS5480 provides five pins—SSEL, RX/SDI,
TX/SDO, CS, and SCLK—for communication between
a host microcontroller and the CS5480.
SSEL is an input that, when low, indicates to the
CS5480 to use the SPI port as the serial interface to
communicate with the host microcontroller. The SSEL
pin has an internal weak pull-up. When the SSEL pin is
left unconnected or pulled high externally, the UART
port is used as the serial interface.
XIN XOUT
C1 = 22pF C2 = 22pF
Figure 1. Oscillator Connections