Cirrus Logic AN83 - Manual (Page 34)

AN83
34 AN83REV3
Q20 := (Q20 * CS_EL_b) + (/CS_EL_b * SDATA)
Q21 := (Q21 * CS_EL_b) + (/CS_EL_b * Q20)
Q22 := (Q22 * CS_EL_b) + (/CS_EL_b * Q21)
Q23 := (Q23 * CS_EL_b) + (/CS_EL_b * Q22)
; Decode logic
EQUALL = (Q20:*:LA20) * (Q21:*:LA21) ; :*: -> Exclusive NOR operator
EQUALH = (Q22:*:LA22) * (Q23:*:LA23)
ADD_VALID = /RESET * CS_EL_b * ADD_VALID ; stay clear till any write
+ /RESET * /CS_EL_b ; Set when address write
+ /RESET * ADD_VALID ; Remain set until reset
CHIPSEL_b = RESET ; Get set at RESET
+ /ADD_VALID ; Remain set till address is valid
+ (/ALE * CHIPSEL_b ; Do not change when ALE is LOW
+ (ALE * /(EQUALL * EQUALH)) ; Clear during ALE if address matches
; When ALE is active; CS_b goes active if EQUAL[1:2] are true
; When ALE is inactive; previous state of CS_b is latched.
Figure 23. PAL Program