Rockwell Automation 1771-IE,D17716.5.7 ANAL.INPUT MOD. - Manual (Page 24)

Programming the Analog Input Module
Chapter 4
4Ć5
This example is written for the following conditions (Figure 4.4).
The module resides in rack 1, module group 2, slot 0 8-word block
transfer
BT Array (integer control address) is $N7:51
Data file (integer file address) is $N7:56
Figure 4.4
Example Program for the PLCĆ5/15 Processor
EN
BTR
BLOCK TRANSFER READ
RACK :
GROUP :
MODULE :
BT ARRAY
1
2
0
$N7:51
DN
DATA FILE:
LENGTH:
CONTINUOUS $N7:56
8
N
ER
$N7:51
15
13
12
EN
Important: The PLC-5/15 processor buffers read block transfer data
automatically, so program buffering is not required.
We suggest that you follow programming considerations applicable to
your programmable controller. They are listed below and described in the
manual that accompanied your controller.
PLCĆ2 Family
Determine the first available block transfer address in the timer and
counter area of the data table. For PLC-2/20 and PLC-2/30 processors,
it depends on the number of assigned remote I/O rack numbers.
Leave unused addresses following your last block transfer address for
future block transfer instructions.
Load zeros into the address following the last (reserved) block transfer
address to establish a boundary that prevents the processor from
looking further for additional block transfer addresses.
Buffer incoming (BTR) data. Be sure it is valid before using it.
Examine the BTR done bit and any other status bit that monitors its
validity.
PLCĆ5/15 Example
Programming Considerations