Status register bit definitions, 10g mac sgmii pcs register map – Achronix Speedster22i 10G/40G/100G Ethernet User Manual
Page 70
70
UG029, September 6, 2013
STATUS Register Bit Definitions
Table 36
– STATUS Register Description
Bit#
Bit Name
Type
Description
0
RX_LOC_FAULT
ROR
Latch-High Local Fault Status. Set to '1' when the MAC
detects RX Local Fault Sequences on the XL/CGMII
receive interface. Reset to '0' after read and after reset.
1
RX_REM_FAULT
ROR
Latch-High Remote Fault Status. Set to '1' when the
MAC detects RX Remote Fault Sequences on the
XL/CGMII receive interface. Reset to '0' after read and
after reset.
2
PHY_LOS
RO
PHY indicates loss-of-signal. Represents value of pin
phy_los<n>.
3
TS_AVAIL
RW
Transmit Timestamp Available. Indicates that the
timestamp of the last transmitted 1588 event frame is
available in the register TS_TIMESTAMP.
To clear TS_AVAIL, the bit must be written with a '1'.
4 to
31
reserved
--
unused