CANOGA PERKINS 2240 Fiber Optic Modem - Manual (Page 37)

Chapter 3 Mode and Rate Selection
Slave Clock Mode - Mode 5
37
3.4 Slave Clock Mode - Mode 5
You use the slave clock mode to provide a clock to the DTE that is identical to the clock received
from the other modem. In this mode, the clock signal received from the other end of the link is
sent to the DTE on both Receive Timing (RT) and Send Timing (ST) or equivalent signal leads.
This mode is typically used in tail circuits where the user’s DCE normally provides both the
transmit and receive clocks to the DTE.
Since modems operating in slave mode get the transmit clock from the optical input, the clock to
the DTE is only present when a valid optical signal is present (see Figure 3-2). See Figure 3-3 for
a diagram of the null cable for the DCE-DCE crossover cable.
3.4.1 Loopback Clock for Slave Mode
Select a rate from the Group 1 Internal Clock Rates and set the Rate Switches accordingly.
Whenever a loopback is active, that clock will be sent to the DTE on the Send Timing (ST) and
Receive Timing (RT), or equivalent, signal leads.
NOTE: If the local loopback modem is operating in Mode 5 (slave clock mode),
the remote device will receive garbled data because of the overall timing
configuration. The local loopback will function correctly.
3.5 Asynchronous Mode - Mode 6
The Asynchronous Mode should be used when a data signal is present without a separate clock
signal. The only exception to this is when the signal is bipolar T1 or E1. For those signals, the
2240 interface extracts a clock from the signal.
This mode samples the data signal at 4.096 MHz which results in a pulse distortion of 244 ns.
The effect of this distortion on the connected equipment must be carefully assessed.
For a 37% distortion limit, the maximum data rate is 1.544 Mbps for all forms of NRZ coding. For
the various forms of Manchester or Biphase coding, the limit is 768 Kbps. If the distortion limit is
25%, these limits are reduced to 1.024 Mbps and 512 kbps, respectively.
The Rate Switches do not have any function in asynchronous mode.
Figure 3-2 Typical Tail Circuit Implementation