2 timebase, Timebase, Figure 1-2 – ADLINK PCIe-9852 User Manual
Page 14: Analog input channel bandwidth, ±2 vpp
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4
Introduction
Figure 1-2: Analog Input Channel Bandwidth, ±2 Vpp
1.3.2
Timebase
Sample Clock
Comment
Timebase options
Internal : on board synthesizer
External : CLK IN (front panel),
SSI
Sampling clock
frequency
Internal : 200MHz
3.052kS/s to
200MS/s
External : 40MHz ~ 200MHz
(CLK IN)
Timebase accuracy
< ± 25ppm
External reference
clock source
Front panel, SSI
0.1M
0.3M
1M
3M
10M
30M
100M
300M
−9
−8
−7
−6
−5
−4
−3
−2
−1
0
Bandwidth
Frequency (Hz)
Magnitude (dB)
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