ADLINK PCIe-9852 - Manual (Page 28)

18 Operations
3.3.3 Analog Trigger
An analog trigger is generated when AI input signal level is
detected at the SMA connector CH0, CH1 (selected by software).
The trigger level is also selected by software.
3.3.4 Trigger Export
When acquisition is initiated, a pulse synchronized with the Time-
base clock asserts and is output through trigger output, at a pulse
width programmable from 50ns to 10μs via software.
3.4 Trigger Modes
Trigger modes applied to trigger sources initiate different data
acquisition timings when a trigger event occurs. The following trig-
ger mode descriptions are applied to analog input function.
3.4.1 Post Trigger Mode
Post-trigger acquisition is applicable when data is to be collected
after the trigger event, as shown. When the operation starts, PCIe-
9852 waits for a trigger event. Once the trigger signal is received,
acquisition begins. Data is generated from ADC and transferred to
system memory continuously. The acquisition stops once the total
data amount reaches a predefined value.
Figure 3-5: Post-Trigger Acquisition
3.4.2 Delayed Trigger Mode
Delayed-trigger acquisition is utilized to postpone data collection
after the trigger event, as shown. When PCIe-9852 receives a trig-