Altera Nios II C2H Compiler - Manual (Page 101)

Altera Corporation 9.1 4–7
November 2009 Nios II C2H Compiler User Guide
Understanding the C2H View
memory, making it impossible for the accelerator to read both variables
on the same clock cycle. The C2H Compiler creates a single Avalon-MM
master port to access both values using interleaved accesses.
Figure 4–2. Avalon-MM Master Port Resources
When memory accesses share a single Avalon-MM master port, the
reported data width is that of the largest data type being accessed. The
report shows each dereference operation for the shared Avalon-MM
master port resource. In
Example 4–1 the pointer power requires a
separate Avalon-MM master port resource because it resides in a different
memory than the input values.
For each dereference operation, the report shows the source line on which
the C statement appears. It also shows the variable being dereferenced,
and the data direction (read or write). Any one statement is either a read