Scheduling, Scheduling concepts for hardware accelerators, State machines – Altera Nios II C2H Compiler User Manual
Page 70: Scheduling –30, Scheduling concepts for hardware accelerators –30
 
3–30
9.1
Altera Corporation
Nios II C2H Compiler User Guide
November 2009
Scheduling
Consider the simple struct declaration shown in
.
Example 3–25. Structure Pointer Declaration
struct s_ptr
{
 int element_a;
 int element_b;
 int element_c;
} * my_struct;
In this example, the expression
(my_struct->element_c)
translates
to the following:
*((int *)((void *)mystruct + 2*sizeof(int)))
Scheduling
This section describes how the C2H Compiler schedules operations. The 
C2H Compiler is similar to a traditional C compiler in many respects: It 
parses code, creates a graph of the dependencies, performs some 
optimizations, schedules the sequence to execute each operation, and 
outputs an object file in the form of a hardware accelerator. However, 
fundamental differences exist between scheduling for a microprocessor 
and scheduling for a hardware accelerator. 
Scheduling Concepts for Hardware Accelerators
A microprocessor has limited computational resources, defined by its 
arithmetic logic unit (ALU), and limited I/O resources, defined by its 
data bus architecture. In contrast, a hardware accelerator can have 
arbitrary computational and I/O resources, limited only by the practical 
bounds of resource utilization and the ability to achieve frequency 
performance. These resources can operate in parallel, stalling only to wait 
for data dependencies to resolve. 
The C2H Compiler uses the following fundamental rule for scheduling: 
Perform computation operations and I/O operations as soon as data 
dependencies are resolved. 
State Machines
Sections
“One-to-One C-to-Hardware Mapping” on page 3–1
,
“Memory Accesses” on page 3–15
described how the C2H Compiler translates individual operations, 
assignments, and memory accesses to atomic functional units in