Altera Phase-Locked Loop Reconfiguration IP Core User Manual
Features
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Table of contents
Document Outline
- Phase-Locked Loop Reconfiguration (ALTPLL_RECONFIG) Megafunction
- Features
- Common Applications
- Device Family Support
- Resource Utilization and Performance
- Parameter Settings
- Checking Design Violations With the Design Assistant
- Simulation
- Functional Description—Implementing Multiple Reconfiguration Using an External ROM
- Design Example
- Specifications
- Document Revision History