Transaction layer routing rules, Transaction layer routing rules –3 – Altera Arria V Hard IP for PCI Express User Manual

Page 191

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Chapter 10: Transaction Layer Protocol (TLP) Details

10–3

Transaction Layer Routing Rules

December 2013

Altera Corporation

Arria V Hard IP for PCI Express

User Guide

Transaction Layer Routing Rules

Transactions adhere to the following routing rules:

■

In the receive direction (from the PCI Express link), memory and I/O requests that
match the defined base address register (BAR) contents and vendor-defined
messages with or without data route to the receive interface. The Application
Layer logic processes the requests and generates the read completions, if needed.

■

In Endpoint mode, received Type 0 Configuration requests from the PCI Express
upstream port route to the internal Configuration Space and the Arria V Hard IP
for PCI Express generates and transmits the completion.

■

The Hard IP handles supported received message transactions (Power
Management and Slot Power Limit) internally. The Endpoint also supports the
Unlock and Type 1 Messages. The Root Port supports Interrupt, Type 1 and error
Messages.

■

Vendor-defined Type 0 Message TLPs are passed to the Application Layer.

■

The Transaction Layer treats all other received transactions (including memory or
I/O requests that do not match a defined BAR) as Unsupported Requests. The
Transaction Layer sets the appropriate error bits and transmits a completion, if
needed. These Unsupported Requests are not made visible to the Application
Layer; the header and data is dropped.

Hot Plug Messages

Attention_indicator On Transmit

Receive

No

Yes

No

As per the recommendations in the

PCI

Express Base Specification Revision 2.1

,

these messages are not transmitted to the
Application Layer.

Attention_Indicator
Blink

Transmit

Receive

No

Yes

No

Attention_indicator_
Off

Transmit

Receive

No

Yes

No

Power_Indicator On

Transmit

Receive

No

Yes

No

Power_Indicator Blink

Transmit

Receive

No

Yes

No

Power_Indicator Off

Transmit

Receive

No

Yes

No

Attention
Button_Pressed

(1)

Receive

Transmit

No

No

Yes

Notes to

Table 10–1

:

(1) In Endpoint mode.

(2) In the

PCI Express Base Specification Revision 2.1

, this message is no longer mandatory after link training.

Table 10–1. Supported Message Types

(2)

(Part 3 of 3)

Message

Root

Port

Endpoint

Generated by

Comments

App

Layer

Core

Core (with

App Layer

input)

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