Djnz d, Operation, Description – Zilog EZ80F916 User Manual
Page 150: Condition bits affected, Attributes
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eZ80
®
CPU
User Manual
UM007715-0415
CPU Instruction Set
141
DJNZ d
Decrement B Jump not 0
Operation
B B – 1
if B 0 {
PC PC+d
}
Description
The B register decrements by 1. If the resultant value in register B is not 0, the two’s-com-
plement displacement d is added to the value of the Program Counter. The jump is mea-
sured from the address of the instruction opcode following this instruction.
Condition Bits Affected
None.
Attributes
Mnemonic
Operand
ADL Mode
Cycle
Opcode (hex)
DJNZ
d
X
2/4
10, dd
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