Zilog EZ80F916 - Manual (Page 309)

eZ80
®
CPU
User Manual
UM007715-0415 CPU Instruction Set
300
RETN
Return from Nonmaskable Interrupt
Operation
PC  (SP)
IEF1  IEF2
Description
The RETN instruction returns program control back to the point in the user’s application
code where an interrupt caused the program control to jump to the current nonmaskable
interrupt service routine. The return address pops from the stack and is written to the Pro-
gram Counter. The state of IEF2 is copied back into IEF1. As a result of this copy opera-
tion, maskable interrupts become immediately enabled following the RETN, but only if
they were enabled before the nonmaskable interrupt occurred.
The MADL control bit must be set to 1 to enable mixed-ADL mode interrupts. If the
MADL is reset to 0, the suffixed instructions do not operate correctly. More detailed oper-
ation is provided in Table 87 .
Table 87. RETN Instruction Detail
ADL Suffix Operation
0 None The starting Program Counter is {MBASE, PC[15:0]}.
Pop a 2-byte return address from {MBASE, SPS} into
PC[15:0]. The ADL mode bit remains cleared to 0. The
ending Program Counter is {MBASE, PC[15:0]}.
1 None The starting Program Counter is PC[23:0]. Pop a 3-byte
return address from SPL into PC[23:0]. The ADL mode
bit remains set to 1. The ending Program Counter is
PC[23:0].
0 .S An invalid suffix. RETN.L must be used in all mixed-
memory mode applications.
1 .S An invalid suffix. RETN.L must be used in all mixed-
memory mode applications.