Ld ix/y, (mmn), Operation, Description – Zilog EZ80F916 User Manual
Page 218: Condition bits affected, Attributes
eZ80
®
CPU
User Manual
UM007715-0415
CPU Instruction Set
209
LD IX/Y, (Mmn)
Load Index Register
Operation
IX/Y
(Mmn)
Description
The 16- or 24-bit operand (Mmn) specifies a location in memory. The 16- or 24-bit value
stored at this location in memory is written to the specified multibyte Index Register, IX or
IY.
Condition Bits Affected
None.
Attributes
Zilog recommends against using the .SIL and .LIS suffixes with this instruction. The .SIL
instruction fetches a 24-bit value, Mmn. However, this instruction ignores the upper byte
and uses address {MBASE, mm, nn} instead. The .LIS instruction fetches a 16-bit value,
mn. However, the .LIS instruction does not use the MBASE value. Instead, it uses address
{00, mm, nn}.
Mnemonic Operand
ADL
Mode
Cycle
Opcode (hex)
LD
IX,(mn)
0
6
DD, 2A, nn, mm
LD
IX,(Mmn) 1
8
DD, 2A, nn, mm, MM
LD.LIL
IX,(Mmn) 0
9
5B, DD, 2A, nn, mm, MM
LD.SIS
IX,(mn)
1
7
40, DD, 2A, nn, mm
LD
IY,(mn)
0
6
FD, 2A, nn, mm
LD
IY,(Mmn) 1
8
FD, 2A, nn, mm, MM
LD.LIL
IY,(Mmn) 0
9
5B, FD, 2A, nn, mm, MM
LD.SIS
IY,(mn)
1
7
40, FD, 2A, nn, mm
Note: