Artesyn COMX-P40x0 ENP2 Installation and Use (August 2014) - Manual (Page 71)

Functional Description
COMX-P40x0 ENP2 Installation and Use (6806800R95B) 71
4.12 LAN
Modules with gigabit Ethernet options route a port with LED control signals to the COM Express
connector. The supporting magnetics must be on the carrier board. RGMII is the interface
between the P40x0 MAC and external PHY. This interface is multiplexed with the USB1 ULPI
interface so modules with the gigabit Ethernet option should set RCW[EC1] to 00 to select
RGMII operation.
4.12.1 MDIO
There are two groups of MDIO buses in the P40x0 CPU. The first group called EMI1 complies
with IEEE 802.3 Clause 22 and is used for management of the 1Gb Ethernet connection on
modules with that option, and management of SERDES interfaces configured as SGMII. EMI1
has two pins: EMI1_MDC and EMI1_MDIO. All dTSEC interfaces in the P40x0 CPU share the
same management hardware. External PHY access for all ports is available through the dTSEC1
registers of FM1. EMI1 is based on +2.5V signaling levels.