HP XU700 - Manual (Page 37)

37
2 System Board
Memory Controller Hub (82850)
MCH Interface
The MCH interface provides bus control signals and address paths via the
Hub Link 8-bit access to the ICH2 for transfers between the processor on
the system bus, Dual Rambus bus and AGP 4x bus.
The MCH supports 32-bit host addresses, allowing the processor to address
a space of 4GB. It also provides an 8-deep In-Order Queue supporting up to
eight outstanding transaction requests on the system bus.
Host-initiated input/output signals are positively decoded to AGP or MCH
configuration space and subtractively decoded to Hub Link 8-bit interface.
Host-initiated memory cycles are positively decoded to AGP or RDRAM, and
are again subtractively decoded to Hub Link 8-bit interface.
AGP semantic memory accesses initiated from AGP to DRAM do not require
a snoop cycle (not snooped) on the System bus, since the coherency of data
for that particular memory range will be maintained by the software.
However, memory accesses initiated from AGP using PCI Semantics and
accesses from Hub Link interface to RDRAM do require a snoop cycle on the
System bus.
Memory access whose addresses are within the AGP aperture are translated
using the AGP address translation table, regardless of the originating
interface.
Write accesses from Hub Link interface to the AGP are supported.
•
Power management:
❒ SMRAM space re-mapping to A0000h - BFFFFh (128 KB).
❒ Extended SMRAM space above 256 MB, additional 128 K,
256 K, 512 K, 1 MB TSEG from Top of Memory, cacheable
(cacheability controlled by processor).
❒ Suspend to RAM.
❒ ACPI Rev. 1.0 compliant power management.
❒ APM Rev. 1.2 compliant power management.
❒ Power-managed states are supported for up to two
processors.
•
Arbitration:
❒ Distributed Arbitration Model for Optimum Concurrency
Support.
❒ Concurrent operations of System, hub interface, AGP and
memory buses supported via a dedicated arbitration and
data buffering logic.
•
615 OLGA MCH package.
•
Input/Output Device Support:
❒ Input/Output Controller Hub (ICH2).
❒ PCI 64 Hub (P64H).
Feature Feature