Interphase Tech 4538 - Manual (Page 149)

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4538 Hardware Reference Manual 127
Index
B
BIST Built-in Self Test ........................................ 14
C
Cache Line Size .................................................. 14
Carrier Card ..................................................... 107
Channel Service Unit ........................................... 31
Class Code ......................................................... 14
conventions ........................................................ xii
CPM ................................................................... 8
I
I²O ..................................................................... 19
Interrupt pin ....................................................... 60
Interrupts .......................................... 7 , 20 , 21 , 89
ISP .................................................................. 106
J
Jumpers ........................................................... 106
L
Local Space Mapping ........................................... 4
–LRESETO .................................................. 87 , 88
M
Maximum Latency .............................................. 15
P
PCI base address registers .................................... 14
PCI Command .................................................... 14
PCI configuration registers ................................... 14
PCI DMA Registers ............................................ 17
PCI Interrupt Line ............................................... 15
PCI Interrupt Pin ................................................. 15
PCI local bus configuration registers ..................... 16
PCI Master Latency Timer ................................... 14
PCI Minimum Grant ............................................ 15
PCI registers ....................................................... 15
PCI Status .......................................................... 14
PCI Subsystem Device ID .................................... 15
PCI Subsystem Vendor ID ................................... 14
PMC Connectors ......................................... 98 , 103
R
Resets .................................................... 21 , 87 , 88
Revision Identification ........................................ 14
RTM ................................................................ 110
S
Serial EEPROM ............................................ 27 , 92
Structure ............................................................ 76
T
T1 Transmit Pulse Shape programming ................ 75
Transmit Pulse Shape programming ..................... 31
types .................................................................. xii
V
Vendor and Device Identification ......................... 14
Vital Product Data .............................................. 15