Table 2-1 – Interphase Tech 4538 User Manual

Page 82

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PowerSpan Initialization

60

Interphase Corporation

PWRUP_BOOT=0:

The PowerQUICC II boots locally (not through PCI)

PWRUP_DEBUG_EN=0:Disable debug mode

PWRUP_BYPASS_EN=0:Disable PLL bypass

PowerSpan Register Initialization Through the I²C Serial EEPROM

Table 2-1

provides the PowerSpan Register initialization values stored in the Serial

EEPROM. Refer to PowerSpan documentation, section EEPROM Loading for detailed
mapping between EEPROM addresses and PowerSpan registers.

.

Table 2-1. PowerSpan Register Initialization Values in the Serial EEPROM

EEPROM
Address

Initialization

Value

Description



[

/RQJ ((3520 ORDG



[&

3&, %XV 0DVWHU (QDEOH DQG 3&, PHPRU\ 6SDFH (QDEOH



[

3&, WDUJHW ,PDJH SUHIHWFK LQGLFDWRUV DOO 

±

[

3&, VXEV\VWHP GHYLFH ,'

[±[$

[(

3&, VXEV\VWHP YHQGRU ,'

[%

[

,QWHUUXSW SLQ ,17$ LV XVHG RQ WKH 3&, EXV

[&

[&

3&, %DVH $GGUHVV FRQILJXUDWLRQ UHJLVWHUV HQDEOHG IRU WKH

3RZHU6SDQ UHJLVWHUV DQG WDUJHW ,PDJH  DQG  WZR 3&,WRORFDO

ZLQGRZV  7DUJHW LPDJHV   DQG  QRW HQDEOHG

['

[

3&, WDUJHW ,PDJH   0% 3&, WDUJHW LPDJH   .%

[(

[

3&, WDUJHW LPDJHV  DQG  VL]H QRW GHILQHG QRW HQDEOHG

[)

[

3&, 9LWDO 3URGXFW 'DWD GLVDEOHG

[

[

1R 3&, /RFNRXW

[

[)

,QWHUUXSW SLQV GLUHFWLRQ DOO RXWSXWV H[FHSW ±,17

[

[

3&, ,ð2 WDUJHW LPDJH GLVDEOHG

[±[)

[

5HVHUYHG

[±[

[

3&, GHYLFH ,'

[±[

[(

3&, YHQGRU ,'

[

[

3&, %DVH &ODVV &RGH 1HWZRUN &RQWUROOHU

[

[

3&, 6XE &ODVV &RGH 2WKHU

[

[

3&, SURJUDPPLQJ ,QWHUIDFH

[

[

5HYLVLRQ UHJLVWHU

[±[

[

3% VODYH LPDJH  GLVDEOHG ORFDO WR 3&, ZLQGRZ

[±[

[)

3% VODYH UHJLVWHU LPDJH EDVH DGGUHVV [)

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