3 gpio register structure, Pins – Texas Instruments TMS320DM644x User Manual

Page 10

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2.3

GPIO Register Structure

Peripheral Architecture

The GPIO signals are grouped into banks of 16 signals per bank.

The GPIO configuration registers are organized as one 32-bit register per pair of banks. When there are
an odd number of banks, the upper 16-bit of registers for the last pair are reserved and have no effect. For
the interrupt configuration, the registers associated with GPIO signals that do not support interrupt
capability are also reserved and have no effect.

Table 1

shows the banks and register control bit

information associated with each GPIO pin on the device. The table can be used to locate the register bits
that control each GPIO signal. For detailed information on the GPIO registers, see section

Section 3

.

Table 1. GPIO Register Bits and Banks Associated With GPIO Pins

GPIO Signal

Bank Number

Register Pair Number

Register Field Number

Bit Number

GPIO0

0

register_name01

field_name0

Bit 0

GPIO1

0

register_name01

field_name1

Bit 1

GPIO2

0

register_name01

field_name2

Bit 2

GPIO3

0

register_name01

field_name3

Bit 3

GPIO4

0

register_name01

field_name4

Bit 4

GPIO5

0

register_name01

field_name5

Bit 5

GPIO6

0

register_name01

field_name6

Bit 6

GPIO7

0

register_name01

field_name7

Bit 7

GPIO8

0

register_name01

field_name8

Bit 8

GPIO9

0

register_name01

field_name9

Bit 9

GPIO10

0

register_name01

field_name10

Bit 10

GPIO11

0

register_name01

field_name11

Bit 11

GPIO12

0

register_name01

field_name12

Bit 12

GPIO13

0

register_name01

field_name13

Bit 13

GPIO14

0

register_name01

field_name14

Bit 14

GPIO15

0

register_name01

field_name15

Bit 15

GPIO16

1

register_name01

field_name16

Bit 16

GPIO17

1

register_name01

field_name17

Bit 17

GPIO18

1

register_name01

field_name18

Bit 18

GPIO19

1

register_name01

field_name19

Bit 19

GPIO20

1

register_name01

field_name20

Bit 20

GPIO21

1

register_name01

field_name21

Bit 21

GPIO22

1

register_name01

field_name22

Bit 22

GPIO23

1

register_name01

field_name23

Bit 23

GPIO24

1

register_name01

field_name24

Bit 24

GPIO25

1

register_name01

field_name25

Bit 25

GPIO26

1

register_name01

field_name26

Bit 26

GPIO27

1

register_name01

field_name27

Bit 27

GPIO28

1

register_name01

field_name28

Bit 28

GPIO29

1

register_name01

field_name29

Bit 29

GPIO30

1

register_name01

field_name30

Bit 30

GPIO31

1

register_name01

field_name31

Bit 31

GPIO32

2

register_name23

field_name32

Bit 0

GPIO33

2

register_name23

field_name33

Bit 1

GPIO34

2

register_name23

field_name34

Bit 2

GPIO35

2

register_name23

field_name35

Bit 3

GPIO36

2

register_name23

field_name36

Bit 4

GPIO37

2

register_name23

field_name37

Bit 5

General-Purpose Input/Output (GPIO)

10

SPRUE25 – December 2005

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