12 gpio interrupt status register (intstatn), Section 3.12 – Texas Instruments TMS320DM644x User Manual
Page 34
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3.12
GPIO Interrupt Status Register (INTSTATn)
Registers
The status of GPIO interrupt events can be monitored by reading the GPIO interrupt status register
(INTSTATn). In the associated bit position, pending GPIO interrupts are indicated with a logic 1 and GPIO
interrupts that are not pending are indicated with a logic 0. The GPIO interrupt status register
(INTSTAT01) is shown in
, INTSTAT23 is shown in
, INTSTAT4 is shown in
,
and described in
. See
to determine the INTSTATn bit associated with each GPIO bank
and pin number.
Figure 31. GPIO Banks 0 and 1 Interrupt Status Register (INTSTAT01)
31
30
29
28
27
26
25
24
STAT31
STAT30
STAT29
STAT28
STAT27
STAT26
STAT25
STAT24
R/W1C-0
R/W1C-0
R/W1C-0
R/W1C-0
R/W1C-0
R/W1C-0
R/W1C-0
R/W1C-0
23
22
21
20
19
18
17
16
STAT23
STAT22
STAT21
STAT20
STAT19
STAT18
STAT17
STAT16
R/W1C-0
R/W1C-0
R/W1C-0
R/W1C-0
R/W1C-0
R/W1C-0
R/W1C-0
R/W1C-0
15
14
13
12
11
10
9
8
STAT15
STAT14
STAT13
STAT12
STAT11
STAT10
STAT9
STAT8
R/W1C-0
R/W1C-0
R/W1C-0
R/W1C-0
R/W1C-0
R/W1C-0
R/W1C-0
R/W1C-0
7
6
5
4
3
2
1
0
STAT7
STAT6
STATSTAT5
STAT4
STAT3
STAT2
STAT1
STAT0
R/W1C-0
R/W1C-0
R/W1C-0
R/W1C-0
R/W1C-0
R/W1C-0
R/W1C-0
R/W1C-0
LEGEND: R/W = Read/Write; W1C = Write 1 to clear bit (writing 0 has no effect); -n = value after reset
Figure 32. GPIO Banks 2 and 3 Interrupt Status Register (INTSTAT23)
31
30
29
28
27
26
25
24
STAT63
STAT62
STAT61
STAT60
STAT59
STAT58
STAT57
STAT56
R/W1C-0
R/W1C-0
R/W1C-0
R/W1C-0
R/W1C-0
R/W1C-0
R/W1C-0
R/W1C-0
23
22
21
20
19
18
17
16
STAT55
STAT54
STAT53
STAT52
STAT51
STAT50
STAT49
STAT48
R/W1C-0
R/W1C-0
R/W1C-0
R/W1C-0
R/W1C-0
R/W1C-0
R/W1C-0
R/W1C-0
15
14
13
12
11
10
9
8
STAT47
STAT46
STATSTAT45
STAT44
STAT43
STAT42
STAT41
STAT40
R/W1C-0
R/W1C-0
R/W1C-0
R/W1C-0
R/W1C-0
R/W1C-0
R/W1C-0
R/W1C-0
7
6
5
4
3
2
1
0
STAT39
STAT38
STAT37
STAT36
STAT35
STAT34
STAT33
STAT32
R/W1C-0
R/W1C-0
R/W1C-0
R/W1C-0
R/W1C-0
R/W1C-0
R/W1C-0
R/W1C-0
LEGEND: R/W = Read/Write; W1C = Write 1 to clear bit (writing 0 has no effect); -n = value after reset
34
General-Purpose Input/Output (GPIO)
SPRUE25 – December 2005