Texas Instruments TMS320DM644x - Manual (Page 15)

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2.8 EDMA Event Support
2.9 Power Management
2.10 Emulation Considerations
Peripheral Architecture
The GPIO peripheral can provide synchronization events to the EDMA. The EDMA events supported on
this device are listed in
Table 3 .
Table 3. GPIO Synchronization Events to the EDMA
Interrupt Source EDMA Synchronization Event Number
GPIO0 32
GPIO1 33
GPIO2 34
GPIO3 35
GPIO4 36
GPIO5 37
GPIO6 38
GPIO7 39
GPIO Bank 0 40
GPIO Bank 1 41
GPIO Bank 2 42
GPIO Bank 3 43
GPIO Bank 4 44
The GPIO peripheral can be placed in reduced-power modes to conserve power during periods of low
activity. The power management of the GPIO peripheral is controlled by the processor Power and Sleep
Controller (PSC). The PSC acts as a master controller for power management for all of the peripherals on
the device. For detailed information on power management procedures using the PSC, see the
TMS320DM644x DMSoC ARM Subsystem Reference Guide (SPRUE14).
When the GPIO peripheral is placed in a low-power state by the PSC, the interrupt generation capability is
suspended until the GPIO peripheral is removed from the low-power state. While in the low-power state,
the GPIO signals configured as outputs are maintained at their state prior to the GPIO peripheral entering
the low-power state.
The GPIO peripheral is not affected by emulation suspend events (such as halts and breakpoints).
SPRUE25 – December 2005 General-Purpose Input/Output (GPIO) 15