Texas Instruments TMS320C3x User Manual

Page 570

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LDE

Load Floating-Point Exponent

13-112

Syntax

LDE

src, dst

Operation

src(exp)

dst(exp)

Operands

src general addressing modes (G):

0 0

register (R

n, 0

n

7)

0 1

direct

1 0

indirect (disp = 0–255, IR0, IR1)

1 1

immediate

dst register

(R

n, 0

n

7)

Opcode

31

24 23

16

8 7

0

15

0 0 0

0 0

0

1

1

1

dst

src

G

Description

The exponent field of the

src operand is loaded into the exponent field of the

dst register. No modification of the dst register mantissa field is made unless
the value of the exponent loaded is the reserved value of the exponent for 0
as determined by the precision of the

src operand. Then the mantissa field of

the

dst register is set to 0. The src and dst operands are assumed to be float-

ing-point numbers. Immediate values are evaluated in the short floating-point
format.

Cycles

1

Status Bits

LUF

Unaffected

LV

Unaffected

UF

Unaffected

N

Unaffected

Z

Unaffected

V

Unaffected

C

Unaffected

OVM

Operation is not affected by OVM bit value.

Mode Bit

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