Texas Instruments TMS3320C5515 - Manual (Page 45)

www.ti.com Power Management
Table 1-27. USB System Control Register (USBSCR) Field Descriptions (continued)
Bit Field Value Description
13 USBVBUSDET USB VBUS detect enable. The USB VBUS pin has two comparators that monitor the
voltage level on the pin. These comparators can be disabled for power savings when not
needed.
0 USB VBUS detect comparator is disabled.
1 USB VBUS detect comparator is enabled.
12 USBPLLEN USB PLL enable. This is normally only used for test purposes.
0 Normal USB operation.
1 Override USB suspend end behavior and force release of PLL from suspend state.
11-7 Reserved 0 Reserved. Always write 0 to these bits.
6 USBDATPOL USB data polarity bit. Changing this bit can be useful since the data polarity is opposite
on type-A and type-B connectors.
0 Reverse polarity on DP and DM signals.
1 Normal polarity (normal polarity matching pin names).
5-4 Reserved 0 Reserved.
3 USBOSCBIASDIS USB internal oscillator bias resistor disable.
0 Internal oscillator bias resistor enabled (normal operating mode).
1 Internal oscillator bias resistor disabled. Disabling the internal resistor is primarily for
production test purposes. But it can also be used when an external oscillator bias resistor
is connected between the USB_MXI and USB_MXO pins (but this is not a recommended
configuration).
2 USBOSCDIS USB oscillator disable bit.
0 USB internal oscillator enabled.
1 USB internal oscillator disabled. Causes the USB_MXO pin to be tristated and the
oscillator's clock into the core is forced low.
1-0 BYTEMODE USB byte mode select bits.
0 Word accesses by the CPU are allowed.
1h Byte accesses by the CPU are allowed (high byte is selected).
2h Byte accesses by the CPU are allowed (low byte is selected).
3h Reserved.
1.5.3.5 RTC Domain Clock Gating
Dynamic RTC domain clock gating is not supported. Note that the RTC oscillator, and by extension the
RTC domain, can be permanently disabled by not connecting a crystal and tying off the RTC oscillator
pins. However, in this configuration, the RTC must still be powered and the RTC registers starting at I/O
address 1900h will not be accessible. This includes the RTC Power Management Register
(RTCPMGT)
that provides powerdown control to the on-chip LDO and control of the WAKEUP and RTC_CLKOUT pins.
See the device-specific data manual for more details on permanently disabling the RTC oscillator.
45 SPRUFX5A – October 2010 – Revised November 2010 System Control
Submit Documentation Feedback
Copyright © 2010, Texas Instruments Incorporated