1 idle2 procedure – Texas Instruments TMS3320C5515 User Manual

Page 51

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Power Management

1.5.5.1

IDLE2 Procedure

In this power configuration all the power domains are turned on, the RTC and clock generator domains are
enabled, the CPU domain is disabled, and the DSP peripherals are disabled. When you enter this power
configuration all CPU and peripheral activity in the DSP is stopped. Leaving the clock generator domain
enabled allows the DSP to quickly exit this power configuration since there is no need to wait for power
domains to turn on or for the PLL to re-lock.

Follow these steps to enter the IDLE2 power configuration:

1. Wait for completion of all DMA transfers. You can poll the DMA transfer status and disable DMA

transfers through the DMA registers.

2. Disable the USB clock domain as described in

Section 1.5.3.4

.

3. Idle all the desired peripherals in the peripheral clock domain by modifying the peripheral clock gating

configuration registers (PCGCR1 and PCGCR2). See

Section 1.5.3.2

for more details on setting the

DSP peripherals to idle mode.

4. Clear all interrupts by writing ones to the CPU interrupt flag registers (IFR0 and IFR1).
5. Enable the appropriate wake-up interrupt in the CPU interrupt enable registers (IER0 and IER1). If

using the WAKEUP pin to exit this mode, configure the WAKEUP pin as input by setting WU_DIR = 1
in the RTC power management register (RTCPMGT). If using the RTC alarm or periodic interrupt as a
wake-up event, the RTCINTEN bit must be set in the RTC interrupt enable register (RTCINTEN).

6. Disable the CPU domain by setting to 1 the CPUI, MPORTI, XPORTI, DPORTI, IPORTI, and CPI bits

of the idle configuration register (ICR). Note that the MPORT will not go into idle mode if the USB
CDMA, LCD or DMA controllers is not idled.

7. Apply the new idle configuration by executing the “IDLE” instruction. The content of ICR is copied to

the idle status register (ISTR). The bits of ISTR are then propagated through the CPU domain system
to enable or disable the specified clocks.

The IDLE instruction cannot be executed in parallel with another instruction.

To exit the IDLE2 power configuration, follow these steps:

1. Generate the wake-up interrupt you specified during the IDLE2 power down procedure.
2. After the interrupt is generated, the DSP will execute the interrupt service routine.
3. After exiting the interrupt service routine, code execution will resume from the point where the “IDLE”

instruction was originally executed.

You can also exit the IDLE2 power configuration by generating a hardware reset. However, in this case,
the DSP is completely reset and the state of the DSP before going into IDLE2 is lost.

51

SPRUFX5A – October 2010 – Revised November 2010

System Control

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