4 hcntl[1:0] and hr/w: indicating the cycle type, Section 3.4 – Texas Instruments TMS320C6457 User Manual

Page 16

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HPI Operation

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3.4

HCNTL[1:0] and HR/W: Indicating the Cycle Type

The cycle type consists of:

The access type selected by the host by driving the appropriate levels on the HCNTL[1:0] pins of the
HPI.

Table 4

describes the four available access types.

The transfer direction that the host selects with the HR/W pin. The host must drive the HR/W signal
high (read) or low (write).

Table 5

summarizes the cycle types. The HPI samples the HCNTL levels either at the falling edge of HAS

(if HAS is used) or at the falling edge of the internal strobe signal HSTRB (if HAS is not used or is tied
high).

CAUTION

Note that the encoding of HCNTL0 and HCNTL1 for the different types of HPI
accesses varies on many TI DSPs; therefore, you should use caution to ensure
that the correct encoding of these inputs is used for your device. The encoding
of these signals as described in this document applies only to C6457 DSPs.

Table 4. Access Types Selectable by the HCNTL Signals

HCNTL1

HCNTL0

Description

0

0

HPIC access. The host requests to access the HPI control register
(HPIC).

0

1

HPID access with autoincrementing. The host requests to access the
HPI data register (HPID) and to have the appropriate HPI address
register (HPIAR and/or HPIAW) automatically incremented by 1 after
the access.

1

0

HPIA access. The host requests to access the appropriate HPI
address register (HPIAR and/or HPIAW).

1

1

HPID access without autoincrementing. The host requests to access
the HPI data register (HPID) but requests no automatic
post-increment of the HPI address register.

Table 5. Cycle Types Selectable With the HCNTL and HR/W Signals

HCNTL1

HCNTL0

HR/W

Cycle Type

0

0

0

HPIC write cycle

0

0

1

HPIC read cycle

0

1

0

HPID write cycle with autoincrementing

0

1

1

HPID read cycle with autoincrementing

1

0

0

HPIA write cycle

1

0

1

HPIA read cycle

1

1

0

HPID write cycle without
autoincrementing

1

1

1

HPID read cycle without
autoincrementing

16

Host Port Interface (HPI)

SPRUGK7A – March 2009 – Revised July 2010

Copyright © 2009–2010, Texas Instruments Incorporated

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