Sdram_timer register, Sdram_cfg register – Rainbow Electronics AT75C220 User Manual
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AT75C220
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SDRAM_TIMER Register
Register Name: SDRAM_TIMER
Access Type: Read/write
Reset Value: 0x0
•
CNT
This 12-bit field is loaded into a timer which generates the refresh pulse. Each time the refresh pulse is generated, a
refresh burst is initiated. The length of this refresh burst (number of rows refreshed) can be adjusted at compile time by
modifying the value RFSH_LEN. The refresh commands will begin when the timer is loaded for the first time. The value
to be loaded depends on the clock frequency used in the SDMC configuration module, the refresh rate of the SDRAM
and the refresh burst length where 15.6 microseconds is a typical value for a burst of length one.
SDRAM_CFG Register
Register Name: SDRAM_CFG
Access Type: Read/write
Reset Value: 0x0
•
NC
Sets the number of column bits. Default is eight column bits.
31
30
29
28
27
26
25
24
–
–
–
–
–
–
–
–
23
22
21
20
19
18
17
16
–
–
–
–
–
–
–
–
15
14
13
12
11
10
9
8
–
–
–
–
CNT
7
6
5
4
3
2
1
0
CNT
31
30
29
28
27
26
25
24
–
–
–
–
–
TRAS
23
22
21
20
19
18
17
16
TRCD
TRP
15
14
13
12
11
10
9
8
TRP
TRC
TWR
7
6
5
4
3
2
1
0
TWR
CAS
NB
NR
NC
NC
Column Bits
00
8
01
9
10
10
11
11