AT&T 76450 - Manual (Page 13)

Common Systems Connection Standards AT&T Services, Inc
Date: June 2013
ATT-TP-76450, Issue 15
Copyright © 2013, AT&T . All Rights Reserved.
Page 13
consideration as a means for synchronization transport in AT&T. The Device Under
Consideration is referred to as the ‘DUC’.
Note: If the DUC is a GR-2830-CORE compliant Primary Reference Source(PRS) or a GR-
378-CORE compliant Timing Signal Generator (TSG), or a component of a PRS or TSG, enter
N/A in checklist question 3.1.1 and note the system type in the remarks for question 3.1.1. No
further responses are required for PRS and TSG systems.
3.1 Standards Compliant External Frequency Timing Requirements
Devices that support synchronous interfaces require some sort of precision frequency timing
reference for interoperability with other transport and switching interfaces. For devices located
in a Central Office (CO) or a Mobile Telephone Switching Office (MTSO), the standard method
for supplying a precision frequency timing reference is via connections to the Building
Integrated Timing Supply system (BITS), which is an ensemble of a PRS or PRS traceable
timing source, and a TSG. The BITS system is sometimes referred to as the ‘BITS clock’, or
simply as the ‘clock’.
Exceptions to BITS timing may occur if the DUC will be deployed in a manner that does not
require external frequency timing from the BITS system. As an example, an Ethernet switch or
a router may be deployed in one application that requires only Ethernet interfaces, and an
external frequency timing source is not required. The same basic platform may also be
deployed in other applications where synchronous interfaces such as DS1 or SONET are
required, and external frequency timing is needed for synchronous interoperability with other
elements in the network. Other exceptions may occur if the deployment proposes use of loop
timing or line timing in lieu of BITS timing. The respondent may need to confer with the AT&T
product deployment team to address the actual deployment proposed and the impact to DUC
timing.
AT&T standards for external frequency timing signal formats are DS1 (SF (preferred) or ESF
1.544 mb/sec), and Composite Clock (64/8 kb/sec). See GR-1244-CORE and GR-499-CORE
for detailed explanation of the signal formats. Other formats may be supported in very specific
applications such as MTSO RAN or trans-oceanic cable heads.
AT&T requirements for external frequency timing input interfaces are based upon GR-1244
and are listed here:
•
The DUC timing input interface consists of wire wrap pins (T/R/S) that are located
on the back side of the DUC chassis.
•
There are Primary and Secondary inputs for redundancy.
•
The DUC chassis provides a resistive termination of 100 Ohms for DS1 clock, or
133 Ohms for Composite clock (+/- 5%) for each timing input circuit. The timing
signal termination is present independent of the presence or absence of DUC
removable modules.