Agilent Technologies 6028A - Manual (Page 108)

Standard Commands for Programmable Instruments (SCPI) 108
NOTE Since the power supply impliments *PSC, this register is cleared at power turn on if *PSC = 1
Status Programming Examples
ESE 60
Enables all error conditions into the ESB summary bit
ESE 129
Enables only the power-on and operation complete events into the ESB summary bit
Status Byte Register
The Status Byte register summarizes the information from all other status groups and is fully defined in the IEEE 488.2
Standard Digital Interface for Programmable Instrumentation. The bit configuration is shown in Table C-1. The Status Byte
can be read either by a serial poll or by the common *STB ? query. Both methods return the same data except for bit 6.
Sending *STB ? returns MSS in bit 6, while polling retums RQS in hit~
The RQS Bit. When the power supply requests service, it sets the SRQ interrupt line true and latches RQS into bit 6 of the
Status Byte register. When the controller sends a serial poll to service the interrupt, the RQS bit is returned in bit position 6
of the register and also cleared inside the register. The remaining bits of the Status Byte register are not disturbed.
The MSS Bit. The MSS bit is real-time (unlatched) summary of all Status Byte register bits that are enabled by the Service
Request Enable register. MSS goes true whenever the power supply has at least one reason (and possibly more) for
requesting service. Sending the power supply an
*STB? query reads the MSS bit in position 6 of the status byte. None of the
bits are cleared during reading. To determine the service needs of the power supply without actually servicing any
interrupts, send
*STB?.
Clearing the Status Byte Register. Except for clearing RQS, both methods of reading the Status Byte register (serial polling
and *STB ?) do not alter the contents of the register. Normal application programs clear the register by performing the
following actions:
1.
Read the serial poll response to determine which summary bits are active.
2. Read the corresponding event register to determine which events have caused the summary bit to be set. This clears
the register, removing the interrupt.
3. The interrupt will recur until the specific condition that generated each event is removed. If this is not possible, the
event can be disabled by programming the corresponding bit of the group Enable register (or PTR/NTR filter).
Service Request Enable Register
Register Functions. This register is a mask that determines which bits from the Status Byte register will be ORed to generate
a service request (SRQ). It is programmed with the *SRE common command. When this register is cleared, no service
requests can be generated to the controller.
Register Programming
Program Command *SRE <NRf~
Read Query *SRE?
Clear Command *SRE 0
NOTE Since the power supply implements *PSC, this register is cleared at power turn on if *PSC = 1