Clock region management unit (crmu), Clock region, Figure 8: detailed view a clock region – Achronix Speedster22i Clock and Reset Networks User Manual

Page 17

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UG027, May 21, 2014

RLBs

CRMU

RLBs

BRAMs

RLBs

MULTs

RLBs

BRAMs

LRAMs

MULTs

Global Clocks
from Clock Hub

Direct Clocks
from Clock Mux

Clock

Region

From data
interconnect in fabric

Figure 8: Detailed View a Clock Region

Clock Region Management Unit (CRMU)

Every clock region contains a Clock Region Management Unit (CRMU), which does a variety
of functions, including clock muxing and clock division.

The CRMU has two clock muxing blocks, each taking in half of the incoming global clocks
and direct clocks as well as a quarter of the signals coming in through the 16-bit data
interconnect bus. These signals go through a 32-8 mux and are then optionally divided down.
These 8-bit buses are then aggregated to form the 16-bit clock output bus which is provided
to all of the columns in the clock region fabric. The clock division and gating logic is
controlled by signals coming in from the data interconnect bus.

A summary of the features available in the CRMU are as follows:

a. Divider, with 5 (static) divide-by settings: 1, 2, 4, 6, 8,
b. Dynamic Clock gate, allowing real-time clock gating (for power management),
c. Glitchless mux, allowing dynamic muxing between different clock sources for that

particular clock region.

Figure 9 below illustrates the internals of the CRMU.

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