ADLINK DAQe-2502 - Manual (Page 10)

iv List of Figures
List of Figures
Figure 1-1: DAQ-/DAQe-/PXI-2502/2501 Block Diagram ............ 7
Figure 2-1: DAQe-2502/2501 Card Layout ................................ 13
Figure 2-2: DAQ-2502/2501 Card Layout .................................. 14
Figure 2-3: DAQ-2502/2501 Card Layout .................................. 15
Figure 4-1: Scan Timing............................................................. 25
Figure 4-2: Post Trigger ............................................................. 26
Figure 4-3: Delay Trigger ........................................................... 27
Figure 4-4: Post Trigger with Retrigger ...................................... 28
Figure 4-5: Scatter/gather DMA ................................................. 30
Figure 4-6: Block Diagram of D/A Group ................................... 31
Figure 4-7: FIFO Data Format.................................................... 32
Figure 4-8: Typical D/A Timing of Waveform Generation .......... 37
Figure 4-9: Post Trigger Generation .......................................... 38
Figure 4-10: Delay-Trigger Generation ........................................ 39
Figure 4-11: Post Trigger or Delay-Trigger Generation with
Retrigger .................................................................. 40
Figure 4-12: Finite Iterative Waveform Generation with
Post-trigger .............................................................. 41
Figure 4-13: Post Trigger or Delay-Trigger Generation with
Retrigger .................................................................. 41
Figure 4-14: Stop Mode I ............................................................. 43
Figure 4-15: Stop Mode II ............................................................ 44
Figure 4-16: Stop Mode III ........................................................... 44
Figure 4-17: Mode1 Operation ..................................................... 47
Figure 4-18: Mode2 Operation ..................................................... 48
Figure 4-19: Mode 3 Operation .................................................... 48
Figure 4-20: Mode4 Operation ..................................................... 49
Figure 4-21: Mode5 Operation ..................................................... 49
Figure 4-22: Mode6 Operation ..................................................... 50
Figure 4-23: Mode7 Operation ..................................................... 50
Figure 4-24: Mode8 Operation ..................................................... 51
Figure 4-25: Analog Trigger Block Diagram................................. 52
Figure 4-26: Below-Low Analog Trigger Condition ...................... 53
Figure 4-27: Above-High Analog Trigger Condition ..................... 54
Figure 4-28: Inside-Region Analog Trigger Condition.................. 54
Figure 4-29: High-Hysteresis Analog Trigger Condition............... 55
Figure 4-30: Low-Hysteresis Analog Trigger Condition ............... 55
Figure 4-31: DAQ Signals Routing............................................... 56