Refer to, For informa, Table 6–1 – Altera Cyclone III LS FPGA User Manual

Page 23

Advertising
background image

Chapter 6: Board Test System

6–5

Using the Board Test System

© October 2009 Altera Corporation

Cyclone III LS FPGA Development Kit User Guide

PSO

—Sets the MAX II PSO register. The following options are available:

Use PSR

—Allows the PSR to determine the page of flash memory to use for

FPGA reconfiguration.

Use PSS

—Allows the PSS to determine the page of flash memory to use for

FPGA reconfiguration.

PSR

—Sets the MAX II PSR register. The numerical values in the list corresponds to

the page of flash memory to load during FPGA reconfiguration. Refer to

Table 6–1

for more information.

PSS

—Displays the MAX II PSS register value. Refer to

Table 6–1

for the list of

available options.

OCR1

—Sets the MAX II OCR1 register. Refer to

Table 6–1

for the list of available

options.

SRST

—Resets the system and reloads the FPGA with a design from flash memory

based on the other MAX II register values. Refer to

Table 6–1

for more information.

1

Because the Config tab requires that a specific design is running in the FPGA, writing
a 0 to SRST or changing the PSO value can cause the Board Test System to stop
running.

Table 6–1. MAX II Registers

Register Name

Read/Write

Capability

Description

System Reset
(SRST)

Write only

Set to 0 to initiate an FPGA reconfiguration.

Page Select Register
(PSR)

Read / Write

Determines which of the two pages of flash memory to use
for FPGA reconfiguration. The flash memory ships with
pages 0 and 1 preconfigured.

Page Select Override
(PSO)

Read / Write

When set to 0, the value in PSR determines the page of
flash memory to use for FPGA reconfiguration. When set to
1, the value in PSS determines the page of flash memory to
use for FPGA reconfiguration.

Page Select Switch
(PSS)

Read only

Holds the current value of the illuminated PROGRAM LED
(D29-D31) based on the following encoding:

0 = PROGRAM LED0 LED (D31) and corresponds to the
flash memory page for the factory hardware design

1 = PROGRAM LED1 LED (D30) and corresponds to the
flash memory page for the user hardware 1 design

2 = PROGRAM LED2 LED (D29) and corresponds to the
flash memory page for the user hardware 2 design

Oscillator Control
Register 1 (OCR1)

Read / Write

Determines the U17 oscillator output frequency based on
the following options:

0 = 100 MHz

1 = 125 MHz

2 = 150 MHz

3 = 156.25 MHz

Advertising