Altera Cyclone III LS FPGA - Manual (Page 24)

6–6 Chapter 6: Board Test System
Using the Board Test System
Cyclone III LS FPGA Development Kit User Guide © October 2009 Altera Corporation
JTAG Chain
This control shows all the devices currently in the JTAG chain. The Cyclone III LS
device is always the first device in the chain.
1 Installing the shunt jumper on jumper J11 pins 1-2 includes the MAX II device in the
JTAG chain. Installing the shunt jumper on jumper J12 or setting the anti-tamper DIP
switch SW2.3 to the off position breaks the JTAG chain.
f
For information about the anti-tamper design example, refer to <install
dir>\kits\cycloneIIILS_3cls200_fpga\examples\max2\at_example\rea
dme_at_example.txt
.
Board Information
 MAX-II rev —Indicates the version of MAX II code currently running on the
board. The MAX II code resides in the <install
dir>\kits\cycloneIIILS_3cls200_fpga\examples directory. Newer revisions of
this code might be available on the
Cyclone III LS FPGA Development Kit page of
the Altera website.
 MAC —Indicates the MAC address of the board.
Flash Memory Map
This control shows the memory map of the flash memory device on your board.
The GPIO Tab
The GPIO tab allows you to interact with all the general purpose user I/O
components on your board. You can write to the LCD, read DIP switch settings, turn
LEDs on or off, and detect push button presses.
Figure 6–3 shows the GPIO tab.