Altera PowerPlay Early Power Estimator - Manual (Page 13)

Altera Corporation 2–5
October 2005 PowerPlay Early Power Estimator User Guide: Stratix, Stratix GX & Cyclone FPGAs
Setting Up PowerPlay Early Power Estimator for Stratix, Stratix GX & Cyclone FPGAs
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For more information on the simulation-based power estimation feature
in Quartus II software, refer to the PowerPlay Early Power Estimator
chapter in the Quartus II Handbook.
To use the PowerPlay early power estimator, enter the device resources,
operating frequency, toggle rates and other parameters in the PowerPlay
early power estimator. If you do not have an existing design, then you
must estimate the number of device resources your design uses in order
to enter the information into the PowerPlay early power estimator.
Estimating Power Before Starting the FPGA Design
FPGAs provide the convenience of a shorter design cycle and faster
time-to-market than ASICs or ASSPs. This means that the board design
often takes places during the FPGA design cycle, and the power planning
for the device can happen before any of the FPGA design is complete.
Table 2–1 shows the advantages and disadvantages to using the
PowerPlay early power estimator before you begin the FPGA design.
To estimate power usage with the PowerPlay early power estimator if
you have not started your FPGA design, perform the following steps:
1. Download the PowerPlay early power estimator from the Altera
web site (www.altera.com).
2. Select the target device and package from the PowerPlay early
power estimator Device section.
3. Enter in the requested values for any relevant power consumption
section and clock domain. I
CC
and P values are calculated
automatically, and an I
CC
and P subtotal are given for each section.
4. The PowerPlay early power estimator displays the estimated power
usage in the Total section.
Table 2–1. Power Estimation Before FPGA Design Has Begun
Advantages Disadvantages
Power estimation can be done before
any FPGA design is complete ● Accuracy depends on user input and
estimate of the device resources
● Process can be time consuming