Altera PowerPlay Early Power Estimator - Manual (Page 45)

Altera Corporation 3–27
January 2007 PowerPlay Early Power Estimator For Stratix II, Stratix II GX & HardCopy II
Using the PowerPlay Early Power Estimator
1
The power calculated in the HSDI section only applies to the
transmitter serializer block or the receiver deserializer block.
The transmitter and receiver are implemented using the
altlvds
megafunction. The I/O buffer power is calculated in
the I/O section and the PLL power is calculated in the PLL
section.
Each row in the HSDI section represents a separate receiver or
transmitter domain. You must enter the following parameters for
transmitter and receiver domains:
■ Data rate (in Mbps)
■ Number of channels in that transmitter domain.
■ Toggle percentage
1 The receiver power is the same whether or not the DPA circuitry
is used.
Table 3–7 describes the parameters in the HSDI section of the PowerPlay
Early Power Estimator.
Table 3–7. HSDI Section Information
Column Heading Description
TX/RX Module Enter a name for the module in this column. This is an optional value.
Data Rate (Mbps) Enter the maximum data rate in Mbps of the receiver or transmitter module. The
SERDES circuitry can transmit and receive data up to 1,000 Mbps per channel.
Therefore, the data rate must be a decimal number from 0 to 1,000 Mbps.
# of Channels Enter the number of receiver and transmitter channels running at the above data
rate. This number must be an integer value from 0 to 156.
Toggle % Enter the average percentage of toggling on each clock cycle. The toggle % ranges
from 0 to 100%. The default toggle percentage is 50%.
Total Power This shows the estimated power in W, based on the data rate and number of
channels entered. This value is calculated automatically.
User Comments Enter any comments. This is an optional entry.