Altera Transceiver Signal Integrity - Manual (Page 7)

February 2013 Altera Corporation Transceiver Signal Integrity Development Kit,
Stratix V GT Edition User Guide
1. About This Kit
The Altera ® Stratix ® V GT Transceiver Signal Integrity Development Kit is a complete
design environment that includes both the hardware and software you need to
develop Stratix V GT FPGA designs. The one-year license for the Quartus
® II software
provides everything you need to begin developing custom Stratix V GT FPGA
designs. The following list describes what you can accomplish with the kit:
■ Evaluate transceiver performance from 600 Mbps up to 12.5 Mbps.
■ Evaluate transceiver performance up to 28 Gbps for the GT channels.
■ Generate and check pseudo-random binary sequence (PRBS) patterns.
■ Dynamically change differential output voltage (V
OD
) pre-emphasis, and
equalization settings to optimize transceiver performance for your channel.
■ Perform jitter analysis.
■ Verify physical medium attachment (PMA) compliance to PCI Express ® (PCIe ® ),
Gbps Ethernet (GbE), XAUI, CEI-6G, Serial RapidIO ® , high-definition serial digital
interface (HD-SDI), and other major standards.
Kit Features
This section briefly describes the Transceiver Signal Integrity Development Kit,
Stratix V GT Edition contents.
Hardware
The Transceiver Signal Integrity Development Kit, Stratix V GT Edition includes the
following hardware:
■ Stratix V GT development board—A development platform that allows you to
develop and prototype hardware designs running on the Stratix V GT FPGA.
f For detailed information about the board components and interfaces, refer
to the
Transceiver Signal Integrity Development Kit, Stratix V GT Edition
Reference Manual .
■ Power supply and cables—The kit includes the following items:
■ Power supply and AC adapters for North America/Japan, Europe, and the
United Kingdom
■ USB type A to B cable
■ Ethernet cable