Sundance SMT130 v.1.0 - Manual (Page 29)

Page 29 of 46 SMT130 User Manual V1.0
12.3.1 Global bus access protocol
In Figure 6, the WritePCIApperture function calls a function
C6xGlobalWriteClockMB().
This function enables the DSP’s global bus to transfer Length words from the DSP’s
internal memory map pointed to by buffer. The function puts the Global bust into burst
mode. This interface allows a synchronous stream of data to be written to the 256
WORD input FIFO of the Local To PCI aperture 0. For more information on setting
this mode from the DSP can be found in the SMT335 Users Guide. This section
concentrates on the burst mode interface and arbitration mechanism for the DSP to
PCI Bridge aperture access.
The Global bus interface of the DSP uses the following signals to interface to the
local bus of the SMT130.
DSP Signals.
AE*, DE*, CE0*
AE*/DE* are active low address/Data enable signal driven by the SMT130, when the
DSP has ownership of the Bus this signal is driven low by the SMT130 allowing the
DSP to drive the Address pins and Data pins.
CE0* is the Tri-state control for the DSP’s global bus control pins. This is permanently
tied low by the SMT130 as the control signal is always enable.
STRB1*
Data strobe signal from the DSP’s global bus. This is driven low when the DSP is
carrying out an access cycle. The DSP waits for the RDY1* to be driven low by the
SMT130 to indicate transfer has been completed. This interface is carried out in
synchronous burst mode. This requires the DSP to indicate when the burst transfer
is completed. This is accomplished by the DSP by pulling STAT0 low.
RDY1*
Active low transfer acknowledgement. This is driven by the SMT130 to indicate that
the current transfer has been completed.
STAT0..3
DSP Status line. When all of the signals are logic ‘1’ then the DSP Global bus
interface is in an idle state. When any of these signals is driven low the DSP
requesting ownership of the SMT130’s local bus. STAT0 has a special status and
indicates the last data packet transfer when driven low by the DSP.