Sundance SMT130 v.1.0 - Manual (Page 32)

User Manual (QCF42); Version 3.0, 8/11/00; © Sundance Multiprocessor Technology Ltd. 1999
13 Interrupts
13.1 SMT130-To-PCI Interrupts
TBC INT
INTA INTD
PCI Bridge
INTD
C40 IE
IBF IE
OBE IE
TBC IE
DSP INT
IBF INT
OBE INT
TIMIIOF0
TIMIIOF1
TIMIIOF2
INTERRUPT
CONTROL
REGISTER
STATUS
REGISTER
JTAG INT
CONTROL EPLD
INTB
INTC
INTERRUPT
CONTROL
REGISTER
DSP IIOF0
ENABLE
DSP IIOF1
ENABLE
DSP IIOF2
ENABLE
Figure 6 : SMT130 to PCI Interrupts
Interrupts can also be caused by the SMT130 by writing or reading the mailbox
registers in the PCI Bridge.