Sundance SMT370v2 - Manual (Page 14)

Version 2.0 Page 14 of 46 SMT370v2/v3 User Manual
you must make sure that you only ever connect links initialising as transmitters to
links initialising as receivers; never connect two transmitters or two receivers. For
example, connecting link 0 of one TIM to link 4 of another is safe; connecting link 0 of
one TIM to link 2 of another could damage the hardware.
Always connect ComPort 0, 1 or 2 to ComPort 3, 4 or 5.
On most carrier board the physical connection between comm-ports is made with
FMS cables (Ref. SMT3xx-FMS). You must be careful when connecting the cables
the make sure that one end is inserted in the opposite sense to the other. One end
must have the blue backing facing out and the other must have the silver backing
facing out.
The SMT310Q (SMT320) motherboard communicates with the host PC using
ComPort 3 of the site 1 TIM. You should not make any other connections to this
ComPort.
ComPorts (Communication ports) links follow Texas Instrument C4x standard. They
are 8-bit parallel inter-processor ports of the ‘C4x processors.
The ComPorts drive at 3.3v signal levels.
The FPGA can implement up to two FIFO buffered ComPort interfaces fully compliant
with the TIM standard. They are guaranteed for a transfer rate of 20MB/s.
The FIFOs are useful to maintain a maximum bandwidth and to enable parallel
transfers.
Therefore, as an example, each ComPort can be associated with two 15x32-bit
unidirectional FIFOs implemented into the FPGA; one for input and one for output.
An additional one-word buffer makes them appear as 16x32-bit FIFOs.
DATA
D[0..31] FIFO
16 x 32 x 2
D[0..7]
Control Logic and Status
STRB RDY REQ ACK
Port x
Figure 3 - ComPort interface data path.
Sundance High-speed Bus - SHB.
Both SHB buses are identical and 60-bit wide.
SHBs are parallel communication links for synchronous transmissions. Each SHB
can be divided into two independent 8-bit buses. Each 8-bit bus includes a clock and