Sundance SMT370v2 - Manual (Page 19)

Version 2.0 Page 19 of 46 SMT370v2/v3 User Manual
DAC Performance.
Description Specification
Analogue outputs
Maximum voltage 1 Volt peak-to-peak
Impedance 50 :
Bandwidth
External Clock
Minimum voltage
- DC-coupled input. Requires an External
clock signal centered around 0V.
- 0.2 Volt peak-to-peak minimum.
- Maximum voltage: 3.3 Volts
- Minimum voltage: -3.3 Volts
Impedance 50 :
Frequency range 20-160 MHz – low jitter
External Trigger
Frequency Range 30-160 MHz
Signal format
LVTTL (3.3 Volts) format – connected to
3.3V FPGA
Characteristics
Resolution 16 bits
Output format Two’s complement or Binary
Maximum sampling frequency 160 MHz – 400 MHz using interpolation
SFDR Up to 50 dB.
SNR
Figure 9 - DAC Performance.