Sundance SMT329 User Manual
Page 12
Table 1 below shows the actual implementation of the parallel bus connectivity for the VME
slave, TIM global 1, TIM global 2, DMAA, DMAB. These 5 separate bus masters each have
fully dedicated connections to an arbitrating bus switch, which can connect all 5 masters to
any 5 slaves out of the 8 available, AT THE SAME TIME. This architecture avoids the
traditional bottle neck problems associated with a single bus, which is used by one master at
a time.
Slave
S1
S2
S3
S4
S5
S6
S7
S8
Master
VME&
Reset
Control
& DMA
Flash Sram VME
Master
Comms RSLA RSLB
M1 VME
Slave
Y
Y
Y
Y
N
Y
Y
Y
M2 TIM
Global1
N
Y
Y
Y
Y
N
Y
Y
M3 TIM
Global2
N
Y
Y
Y
Y
N
Y
Y
M4 DMAA
N
N
N
Y
Y
N
Y
Y
M5 DMAB
N
N
N
Y
Y
N
Y
Y
Table 1: SMT329 Virtex4 internal bus architecture
There are exceptions to the permitted connectivity indicated by “Y” for connection permitted
and “N” for no connection.
Revision 1 of the Virtex 4 configuration, provides functional equivalence with the SMT328,
which it replaces. Subsequent releases of the Virtex 4 configuration will provide support for
the following additional functions:
VME64 burst transfer modes.
VME 2eSST transfer modes.
RSL TIM interfaces.
1G bit Ethernet connectivity.
DMA to and from the SRAM.
VXS connectivity.
Subsequent revisions of the Virtex 4 configuration will be made available on the Sundance
WEB site along with a utility for updating their flash images on the SMT329. Updates to this
manual will accompany new firmware releases.
User Manual SMT329
Page 12 of 52 Last
Edited:
09/02/2007
10:58:00