Verilink DIU 2130 (880-503297-001) Product Manual - Manual (Page 35)

DIU 2130 Configuration
Verilink 3-11
Clocking Enter K1 to select the clocking option for port 1.
Enter K2 to select the clocking option for port 2.
There are three choices available for clocking a DIU 2130 port:
ST
INV_ST
TT
This option selection determines which clock signal, and/or which
phase of that clock signal, will be used to control the sampling of
the transmit data presented by the DTE. The best choice for this
option is most often determined by factors outside the DIU 2130,
therefore it may be necessary to try varying this option while
monitoring the far end DTE device for reports of received errors.
In all cases, the DIU 2130 will present a clock signal to the DTE, the
source of that transmit clock signal is determined by the timing
source option, not by this option. No matter what selection is made
here: ST, INV-ST or TT, it will not change the phase or the frequency
of the Transmit Clock signal being sent to the DTE.
If ST is selected, the DIU 2130 will sample the transmit data lead,
to determine if the DTE is sending a one or a zero, at the instant of
the negative going transition of the transmit clock signal. This is
the selection which is most often used. The lower the data rate of
the port and the shorter the cable from the DTE to the DIU port; the
greater the chance that ST will be the optimum setting.
If INV-ST is selected, the DIU 2130 will sample the transmit data
lead during the positive going transition of the transmit clock
signal. This is one-half of a clock cycle later than the negative going
transition which is used for ST. The INV-ST option is used in order
to compensate for delay in the DTE itself and/or especially delay
caused by the length of the DTE to DIU cable. With higher data
rates, longer cables, or the combination of high data rate and a long
cable, the probability that INV-ST will be the best option to choose
increases.
Factors such as cable capacitance per foot, inductive reactance in
the cable, conductor thickness (gauge) and especially cable length
will all factor in to the phase relationship between the transmit
clock signal being sent by the DIU and the transmit data arriving at
the DIU transmit data leads. There are too many variables and too
many unknown factors to be able to make hard and fast rules for
selecting the choice between ST and INV-ST.
If the ideal selection has been made, then the DIU 2130 will always
be sampling the transmit data lead near the middle of each
transmit data bit. This insures that the DIU 2130 will correctly
sense whether the DTE has presented a one or a zero during that bit
time and no sampling errors will occur.