1 status reporting structure, 2 operational status register, 3 questionable status register – KEPCO TMA VXI-27 User Manual

Page 33: Status reporting structure -16, Operational status register -16, Questionable status register -16

Advertising
background image

3-16

TMA VXI -27 101602

3.5.9.1

STATUS REPORTING STRUCTURE

The status reporting of the TMA VXI-27 uses four status registers, illustrated in Figure 3-6.
These registers are the Questionable, Operation, Standard Event and Service Request regis-
ters. The Questionable and Operation registers are 16 bit registers and the Standard Event and
Service Request registers are 8 bits. These four registers are referred to as condition registers.
Each of the four condition registers is associated with two related registers: an event register
which holds unlatched events reported in realtime by the instrument and is cleared by reading
the register, and an enable register which allows the contents of the event register to be passed
through to set the associated condition register.

A zero to one transition of a condition register is added to the event register if the specific bit in
the enable register is also a 1. Reading an event register clears all of the bits found in the event
register. If any bits are set in an event register, the following condition register bit is then set.
For example, if the STAT:QUES:ENB (enable) register has bit 0 set and a voltage error is
detected, the event registers bit 0 is set. The 1 in the event register causes bit 3 of the status
byte to be asserted. The Service Request register is ANDed with its enable register for all bits
except bit 6. The result is placed in bit 6 of the Service Request register. If bit 6 is a 1 (true), it
causes the TMA VXI-27 to assert the SRQ line to the host controller.

Figure 3-6 also shows that if the error/event queue is not empty, bit 3 is set in the Service
Request register and bit 4 indicates that a message is available in the output buffer.

3.5.9.2

OPERATIONAL STATUS REGISTER

The OPERational condition register contains conditions which are a part of the instrument’s nor-
mal operation. The definition of each of these bits (condition register) is as follows:

• 1 through 7 - Not Used — always zero.

• 8 - Constant Voltage — 1 indicates the instrument is in constant voltage mode.

• 9 - Relay — 1 indicates the power supply output relay is closed.

• 10 - Constant Current — 1 indicates the instrument is in constant current mode.

• 11 through15 - Not Used — always zero.

3.5.9.3

QUESTIONABLE STATUS REGISTER

The QUEStionable condition register (see Figure 3-6) contains status bits representing data/sig-
nals which give an indication of the quality of various aspects of the signal.

A bit set in the QUEStionable condition register indicates that the data currently being acquired
or generated is of questionable quality due to some condition affecting the parameter associ-
ated with that bit.

• 8 - Voltage Mode — 1 indicates the instrument is in Voltage mode.

• 9 - Relay — 1 indicates the power supply output relay is closed, unit is supplying power

at output terminals.

• 10 - Current Mode — 1 indicates the Power Supply is in Current mode. Changes in this

bit do not affect the event register.

• 14 - Command warning — This bit indicates a non-fatal warning that relates to the

instrument’s interpretation of a command, query, or on or more parameters of a specific

Advertising