FIC M296 - Manual (Page 106)

Hardware Functional Overview
. Bi-directional 16 bit data bus
. Perform 533MB/s bandwidth in 66MHz x 4 mode
. Distributed arbitration strategy with enhanced mode of contiguous DMA data
streaming
. Packet based, pipelining, and split transaction scheme
Dedicated Isochronous Response Queue
. Serves Isochronous downstream transfers responsive to the memory read
requests originated from USB or audio/modem controllers
. Offers privilege service to guarantee minimum latency & timely delivery
NAND Tree for Ball Connectivity Testing.
702-Balls BGA Package.
1.8V Core with Mixed 1.2V 1.5V 1.8V, 2.5V and 3.3V I/O CMOS Technology
4.5.1 SiS 962L MuTIOL Media I/O Features
The SiS962L MuTIOL Media I/O integrates one Universal Serial Bus 2.0 Host Controllers,
the Audio Controller with AC 97 Interface, the Ethernet MAC Controller w/ standard MII
interface, three Universal Serial Bus 1.1 Host Controllers, the IDE Master/Slave controllers,
and SiS MuTIOL technology. The PCI to LPC bridge, I/O Advanced Programmable Interrupt
Controller, legacy system I/O and legacy power management functionalities are integrated
as well. The USB2.0 Host Controller includes one high-speed mode host controller and three
USB1.1 host controllers. The high-speed host controller implements an EHCI interface that
provides 480Mb/s bandwidth for six USB 2.0 ports. The three USB1.1 host controllers
implement an OHCI interface and each USB1.1 host controller provides 12Mb/s bandwidth
for two USB 1.1 ports. Each of six USB ports can be automatically routed to support a High-
speed USB 2.0 device or Full- or Low-speed USB 1.1 device. Besides, each port can be
optionally configured as the wake-up source. Legacy USB devices as well as over current
detection are also implemented. The Integrated AC97 v2.2 compliance Audio Controller that
features a 6-channels of audio speaker out and HSP v.90 modem support. Additionally, the
AC97 interface supports 4 separate SDATAIN pins that is capable of supporting multiple
audio codecs with one separate modem codec. The integrated Fast Ethernet MAC Controller
features an IEEE 802.3 and IEEE 802.3x compliant MAC with external LAN physical layer
chip supporting full duplex 10 Base-T, 100 Base-T Ethernet, or with external Home
networking physical layer chip supporting 1Mb/s & 10Mb/s Home networking. Additionally,
5 wake-up Frames, Magic Packet and link status changed wake-up function in G1/G2 states
are supported. For storing Mac address, two schemes are provided: 1. Store in internal APC
register or 2. Store in external EEPROM. The integrated IDE Master/Slave controllers
features Dual Independent IDE channels supporting PIO mode 0,1,2,3,4, and Ultra DMA
33/66/100/133. It provides two separate data paths for the dual IDE channels that sustain
the high data transfer rate in the multitasking environment. SiS962L supports 6 PCI masters
and complies with PCI 2.2 specification. It also incorporates the legacy system I/O like: two
8237A compatible DMA controllers, three 8254 compatible programmable 16-bit counters,
hardwired keyboard controller and PS2 mouse interface, Real Time clock with 512B CMOS
SRAM and two 8259A compatible Interrupt controllers. Besides, the I/O APIC managing up
to 24 interrupts with both Serial and FSB interrupt delivery modes is supported. The
FIC M295 / M296 Service Manual
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