FIC M296 - Manual (Page 111)

Hardware Functional Overview
4.10 Video Subsystem
The video subsystem, embedded inside the North Bridge chip and the LCD panel, controls the
display output to both the LCD Panel screen and to the external VGA port.
4.10.1 Video Chip Controller
M295
Features summary of the NVIDIA-MAP17 Video Chip Controller:
• 256-bit 3D and 2D graphics accelerator
• Integrated second-generation Transform and Lighting engines
• 25 million triangles per second setup engine with Z-cull and Z-clear
• One Billion texels per second and 800 million pixel per second fill rate
• NVIDIA Shading Rasterizer with 24 of 26 DX8 pixel shading functions and full
set of OpenGL 1.3 pixel combiner operations
• 32-bit color with 32-bit z/stencil
• Cube environment mapping
• DirectX and S3TC texture compression
• Digital Vibrance Control
• Enhanced TwinView dual-display architecture supporting any combination of
notebook LCD, desktop VGA monitor, DVI display or TV set
• Dual CRTC/Simultaneous Dual Display (same or different surfaces)
• Integrated dual LVDS Transmitter supporting LCD panels up to 2048x1536
• Integrated 350 MHz Palette-DAC for analog VGA monitors up to 2048x1536
• Integrated NTSC/PAL TV encoder supporting resolutions up to 1024x768
CONFIDENTIAL
• Integrated TMDS transmitter for Digital Visual Interface support with scaling
and filtering for flat panels up to 1600x1200
• DVD- and HDTV-ready MPEG-2 decoding up to 1920x1080i ATSC format
• MPEG-2 hardware decode, including Inverse Discrete Cosine Transform and
Motion Compensation
• Support for VIP1.1 interface
• Supports Microsoft DirectX 8.0, 7.0, 6.0, and 5.0 (IDCT)
• Fully compliant support for OpenGL 1.2 for all Windows operating systems
and Linux
• PowerMizer technology for maximum performance and long battery life
• Up to 3.2 GB/second memory bandwidth
• Supports 128-bit DDR, 64-bit DDR, and 32-bit DDR SDRAM
• AGP 4x with Fast Writes
• TSMC 0.15um process
• 31x31mm, 604 PBGA package
4-16
FIC M295 / M296 Service Manual