Datasheet – Intel GD82559ER User Manual
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Datasheet
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Networking Silicon — GD82559ER
All accesses, either read or write, are preceded by a command instruction to the device. The
address field is six bits for a 64 register EEPROM or eight bits for a 256 register EEPROM. The
end of the address field is indicated by a dummy zero bit from the EEPROM, which indicates the
entire address field has been transferred to the device. An EEPROM read instruction waveform is
shown in the figure below.
The 82559ER performs an automatic read of seven words (0H, 1H, 2H, AH, Bh, Ch and DH) of the
EEPROM after the de-assertion of Reset.
The 82559ER EEPROM format is shown below in
Figure 12
.
Figure 11. 64 Word EEPROM Read Instruction Waveform
Word
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0H
IA Byte 2
IA Byte 1
1H
IA Byte 4
IA Byte 3
2H
IA Byte 6
IA Byte 5
AH
Sig
ID
0b
BD
Rev ID
1b
DPD
0b
00b
0b
STB
Ena
0b
BH
Subsystem ID
CH
Subsystem Vendor ID
DH
Reserved
Figure 12. 82559ER EEPROM Format
A
1
A
0
E E C S
E E S K
E E D I
E E D O
A
5
A
4
A
2
D
1 5
D
0
R E A D O P c o d e
A
3
A
1
A
0