Intel GD82559ER - Manual (Page 80)

GD82559ER — Networking Silicon
74 Datasheet
NOTES:
1. These values are only applicable in 3.3 V signaling environments. Outside of this limit the input buffer must
consume its minimum current.
2. Input leakage currents include high-Z output leakage for all bidirectional buffers with tri-state outputs.
3. Signals without pull-up resistors have 3 mA low output current; and signals requiring pull-up resistors, 6 mA.
The signals requiring pull-up resistors include: FRAME#, TRDY#, IRDY#, DEVSEL#, STOP#, SERR# and
PERR#.
4. This value is characterized but not tested.
1. This value is characterized but not tested.
V
OHP
Output High Voltage
I
out
= -2 mA
I
out
= -500
µ
A
2.4
0.9V
CC
V
V
PCI
V
OLP
Output Low Voltage
I
out
= 3 mA, 6 mA
I
out
= 1500
µ
A
0.55
0.1V
CC
V
V
3, PCI
C
INP
Input Pin Capacitance 10 pF 4
C
CLKP
CLK Pin Capacitance 5 12 pF 4
C
IDSEL
IDSEL Pin Capacitance 8 pF 4
L
PINP
Pin Inductance 12 nH 4
Table 16. PCI Interface DC Specifications
Table 17. Flash/EEPROM Interface DC Specifications
Symbol Parameter Condition Min Max Units Notes
V
IHL
Input High Voltage 2.0 V
CC
+ 0.5 V
V
ILL
Input Low Voltage -0.5 0.8 V
I
ILL
Input Low Leakage
Current
0 < V
in
< V
CC
±20 µ A
V
OHL
Output High Voltage I
out
= -1 mA 2.4 V
V
OLL
Output Low Voltage I
out
= 2mA 0.4 V
C
INL
Input Pin Capacitance 10 pF 1
Table 18. LED Voltage/Current Characteristics
Symbol Parameter Condition Min Typical Max Units Notes
V
OHLED
Output High Voltage I
out
= -10 mA 2.4 V
V
OLLED
Output Low Voltage I
out
= 10 mA 0.7 V
Table 19. 100BASE-TX Voltage/Current Characteristics
Symbol Parameter Condition Min Typical Max Units Notes
R
ID100
Input Differential
Impedance
DC 10 K Ω
V
IDA100
Input Differential
Accept Peak Voltage
±500 0.7 mV